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A 10-Gb/s Low Jitter Single-Loop Clock and Data Recovery Circuit With Rotational Phase Frequency Detector.

F. Chen, M. Kao, Y. Hsu, J. Wu, C. Chiu, S. Hsu, and M. Chang. IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (11): 3278-3287 (2014)

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Chiu-ching Kuo

Ching-Sheng Chiu

Wilhelm Ching

Yü Chih Chiu

Paisal Chingduang

Other publications of authors with the same name

Single image super-resolution using hybrid patch search and local self-similarity.S. Lo, and C. Chiu. ISCAS, page 1-4. IEEE, (2017)Patch-based HDR video processing for fast moving object reconstruction.Y. Mai, and C. Chiu. ICNC, page 561-565. IEEE Computer Society, (2017)A 100MHz hardware-efficient boost cascaded face detection design.W. Wong, C. Chen, and C. Chiu. ICIP, page 3237-3240. IEEE, (2009)Block-Based Gradient Domain High Dynamic Range Compression Design for Real-Time Applications.T. Wang, W. Ke, D. Zwao, F. Chen, and C. Chiu. ICIP (3), page 561-564. IEEE, (2007)An 8 × 8 20 Gbps Reconfigurable Load Balanced TDM Switch IC for High-Speed Networking.C. Chiu, Y. Hsu, J. Wu, S. Hsu, M. Kao, H. Tzeng, M. Du, P. Yang, M. Lu, F. Chen and 2 other author(s). J. Signal Process. Syst., 66 (1): 57-73 (2012)A 0.64 mm 2 Real-Time Cascade Face Detection Design Based on Reduced Two-Field Extraction.C. Chen, W. Wong, and C. Chiu. IEEE Trans. Very Large Scale Integr. Syst., 19 (11): 1937-1948 (2011)A 10-Gb/s Low Jitter Single-Loop Clock and Data Recovery Circuit With Rotational Phase Frequency Detector.F. Chen, M. Kao, Y. Hsu, J. Wu, C. Chiu, S. Hsu, and M. Chang. IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (11): 3278-3287 (2014)EfficientNet-eLite: Extremely Lightweight and Efficient CNN Models for Edge Devices by Network Candidate Search.C. Wang, C. Chiu, and J. Chang. CoRR, (2020)Accelerating AdaBoost algorithm using GPU for multi-object recognition.P. Tsai, Y. Hsu, C. Chiu, and T. Chu. ISCAS, page 738-741. IEEE, (2015)Assessing automotive functional safety microprocessor with ISO 26262 hardware requirements.Y. Chang, L. Huang, H. Liu, C. Yang, and C. Chiu. VLSI-DAT, page 1-4. IEEE, (2014)

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Disambiguation of "Chiu, Ching-Te"

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A 10-Gb/s Low Jitter Single-Loop Clock and Data Recovery Circuit With Rotational Phase Frequency Detector.

Please choose a person to relate this publication to

Chiu-ching Kuo

Ching-Sheng Chiu

Wilhelm Ching

Yü Chih Chiu

Paisal Chingduang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Chiu, Ching-Te"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 10-Gb/s Low Jitter Single-Loop Clock and Data Recovery Circuit With Rotational Phase Frequency Detector.

Please choose a person to relate this publication to

Chiu-ching Kuo

Ching-Sheng Chiu

Wilhelm Ching

Yü Chih Chiu

Paisal Chingduang

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 10-Gb/s Low Jitter Single-Loop Clock and Data Recovery Circuit With Rotational Phase Frequency Detector.