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An efficient metric of setup time for pulsed flip-flops based on output transition time., , , , и . ICICDT, стр. 9-12. IEEE, (2013)Technology flavor selection and adaptive techniques for timing-constrained 45nm subthreshold circuits., , и . ISLPED, стр. 21-26. ACM, (2009)Nanometer MOSFET effects on the minimum-energy point of 45nm subthreshold logic., , , и . ISLPED, стр. 3-8. ACM, (2009)Efficient Uses of FPGAs for Implementations of DES and Its Experimental Linear Cryptanalysis., , , и . IEEE Trans. Computers, 52 (4): 473-482 (2003)A Time-Memory Tradeoff Using Distinguished Points: New Analysis & FPGA Results., , , и . CHES, том 2523 из Lecture Notes in Computer Science, стр. 593-609. Springer, (2002)MorphIC: A 65-nm 738k-Synapse/mm2 Quad-Core Binary-Weight Digital Neuromorphic Processor with Stochastic Spike-Driven Online Learning., , и . CoRR, (2019)Low Power Techniques Applied to a 80C51 Microcontroller for High Temperature Applications., , , и . PATMOS, том 3728 из Lecture Notes in Computer Science, стр. 19-29. Springer, (2005)Data-Dependent Operation Speed-Up Through Automatically Inserted Signal Transition Detectors for Ultralow Voltage Logic Circuits., , , и . IEEE Trans. Very Large Scale Integr. Syst., 22 (12): 2561-2570 (2014)A fully-synthesized 20-gate digital spike-based synapse with embedded online learning., , , и . ISCAS, стр. 1-4. IEEE, (2017)Implementation of very large dataflow graphs on a reconfigurable architecture for robotic applications., , , и . IPDPS, стр. 143. IEEE Computer Society, (2001)