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Multiple Constant Multiplication Algorithm for High-Speed and Low-Power Design.

, , , and . IEEE Trans. Circuits Syst. II Express Briefs, 63-II (2): 176-180 (2016)

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Synthesizing full-systolic arrays for matrix product on Xilinx's XC4000(E, EX) FPGAs (poster abstract)., , and . FPGA, page 222. ACM, (2000)FPGA implementation of I2C & SPI protocols: A comparative study., , , , and . ICECS, page 507-510. IEEE, (2009)A new binary arithmetic for finite-word-length linear controllers: MEMS applications., , , and . IDT, page 174-179. IEEE, (2014)N latency 2N I/O-bandwidth 2D-array matrix multiplication algorithm., , and . ICECS, page 597-600. IEEE, (2001)A variable RADIX-2r algorithm for single constant multiplication., , , , and . NEWCAS, page 265-268. IEEE, (2017)High-Speed and Low-Power PID Structures for Embedded Applications., , , , and . PATMOS, volume 6951 of Lecture Notes in Computer Science, page 257-266. Springer, (2011)Controlled-Precision Pure-Digital Square-Wave Frequency Synthesizer., , , and . PATMOS, volume 6448 of Lecture Notes in Computer Science, page 211-217. Springer, (2010)Radix-2r Arithmetic for Multiplication by a Constant., and . IEEE Trans. Circuits Syst. II Express Briefs, 61-II (5): 349-353 (2014)Binary Arithmetic for Finite-Word-Length Linear Controllers : MEMS Applications. (Intégration sur électronique dédiée et embarquée du traitement du signal et de la commande pour les microsystemes appliqués à la microrobotique).. University of Franche-Comté, Besançon, France, (2014)