( en | de | ru )

 

Disambiguation of "Hermida, Román"

Author of the publication

copydeleteadd this publication to your clipboard
Formal Techniques for Hardware Allocation.

, , and . VLSI Design, page 161-165. IEEE Computer Society, (1997)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

María Román Navarro

Graciela Román-Alonso

Wilfrido Román Aldama

Román Setton

Christoph Romanowski

 

Other publications of authors with the same name

A unified approach for scheduling and allocation., , , and . Integr., 23 (1): 1-35 (1997)Frequent-Pattern-Guided Multilevel Decomposition of Behavioral Specifications., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 28 (1): 60-73 (2009)Reconsidering the performance of DEVS modeling and simulation environments using the DEVStone benchmark., , , , and . Simul., 93 (6): 459-476 (2017)High-level synthesis of multiple-precision circuitsindependent of data-objects length., , and . DAC, page 612-615. ACM, (2002)Register estimation in unscheduled dataflow graphs., , and . ACM Trans. Design Autom. Electr. Syst., 1 (3): 396-403 (1996)Annealing placement by thermodynamic combinatorial optimization., , and . ACM Trans. Design Autom. Electr. Syst., 9 (3): 310-332 (2004)Reconsidering the performance of DEVS modeling and simulation environments using the DEVStone benchmark., , , , and . CoRR, (2024)Versatile FPGA-Based Functional Validation Framework for Networks-on-Chip Interconnections Designs., , , , , and . PARCO, volume 33 of John von Neumann Institute for Computing Series, page 769-776. Central Institute for Applied Mathematics, Jülich, Germany, (2005)Efficient micro data centres deployment for mobile healthcare monitoring systems in IoT urban scenarios., , , and . J. Simulation, 16 (6): 589-603 (2022)A fragmentation aware High-Level Synthesis flow for low power heterogenous datapaths., , , , and . Integr., 46 (2): 119-130 (2013)