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Dynamic Verification of Cache Coherence Protocols, , and . Workshop on Memory Performance Issues, (2001)Integrated Performance, Power, and Thermal Modeling., , and . Journal of Circuits, Systems, and Computers, 11 (6): 659- (2002)A Performance Study of Instruction Cache Prefetching Methods., and . IEEE Trans. Computers, 47 (5): 497-508 (1998)Scaling up a hybrid genetic linear programming algorithm for statistical disclosure control., , , and . GECCO, page 1675-1682. ACM, (2011)Control Independence in Trace Processors., and . J. Instruction-Level Parallelism, (2000)Instruction-Level Distributed Processing.. Computer, 34 (4): 59-65 (2001)The Complexity of Verifying Memory Coherence and Consistency., , and . IEEE Trans. Parallel Distributed Syst., 16 (7): 663-671 (2005)A study of scalar compilation techniques for pipelined supercomputers., and . ACM Trans. Math. Softw., 16 (3): 223-245 (1990)Power-Efficient DRAM Speculation., , , and . HPCA, page 317-328. IEEE Computer Society, (2008)Multicore Resource Management, , , , , and . IEEE Micro, 28 (3): 6-16 (2008)