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Soft-core eFPGA for Smart Power applications., , , and . ISSoC, page 1-4. IEEE, (2014)An in-circuit debug environment for multiprocessor SOCs based on a HDL RISC soft-core., , , , and . SoC, page 193-196. IEEE, (2004)Sustainable (re-) configurable solutions for the high volume SoC market., , and . IPDPS, page 1-8. IEEE, (2008)A Low-Power Routing Architecture Optimized for Deep Sub-Micron FPGAs., , , , , and . CICC, page 309-312. IEEE, (2006)Design and implementation of a reconfigurable heterogeneous multiprocessor SoC., , , , , , , and . CICC, page 93-96. IEEE, (2006)A stream register file unit for reconfigurable processors., , , , , , and . ISCAS, IEEE, (2006)A dynamically adaptive DSP for heterogeneous reconfigurable platforms., , , , , , , , and . DATE, page 9-14. EDA Consortium, San Jose, CA, USA, (2007)XiSystem: a XiRisc-based SoC with reconfigurable IO module., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 41 (1): 85-96 (2006)A XiRisc-based SoC for embedded DSP applications., , , , , , , and . CICC, page 595-598. IEEE, (2004)Soft-Core Embedded-FPGA Based on Multistage Switching Networks: A Quantitative Analysis., , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (12): 3043-3052 (2015)