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Disambiguation of "Sahoo, Siva Satyendra"

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ExPAN(N)D: Exploring Posits for Efficient Artificial Neural Network Design in FPGA-Based Systems.

, , , , , and . IEEE Access, (2021)

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Nirakar Sahoo

Harekrushna Sahoo

Sarbeswar Sahoo

Balaram Sahoo

Rama Krishna Sahoo

 

Other publications of authors with the same name

Lifetime-aware design methodology for dynamic partially reconfigurable systems., , , and . ASP-DAC, page 393-398. IEEE, (2018)ExPAN(N)D: Exploring Posits for Efficient Artificial Neural Network Design in FPGA-based Systems., , , , , and . CoRR, (2020)MemOReL: A Memory-oriented Optimization Approach to Reinforcement Learning on FPGA-based Embedded Systems., , , and . ACM Great Lakes Symposium on VLSI, page 339-346. ACM, (2021)Markov Chain-based Modeling and Analysis of Checkpointing with Rollback Recovery for Efficient DSE in Soft Real-time Systems., , and . DFT, page 1-6. IEEE, (2020)Cross-layer fault-tolerant design of real-time systems., , and . DFT, page 63-68. IEEE Computer Society, (2016)Area-Optimized Accurate and Approximate Softcore Signed Multiplier Architectures., , , , and . IEEE Trans. Computers, 70 (3): 384-392 (2021)Improving the Timing Behaviour of Mixed-Criticality Systems Using Chebyshev's Theorem., , , , and . DATE, page 264-269. IEEE, (2021)Using Monte Carlo Tree Search for EDA - A Case-study with Designing Cross-layer Reliability for Heterogeneous Embedded Systems., and . VLSI-SoC, page 1-6. IEEE, (2021)Multi-objective design space exploration for system partitioning of FPGA-based Dynamic Partially Reconfigurable Systems., , , and . Integr., (2019)BOT-MICS: Bounding Time Using Analytics in Mixed-Criticality Systems., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (10): 3239-3251 (2022)