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A 1-V CMOS Ultralow-Power Receiver Front End for the IEEE 802.15.4 Standard Using Tuned Passive Mixer Output Pole.

, , , , and . VLSI-SoC (Selected Papers), volume 373 of IFIP Advances in Information and Communication Technology, page 1-21. Springer, (2010)

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A 1.8-V 3.6-mW 2.4-GHz Fully Integrated CMOS Frequency Synthesizer for the IEEE 802.15.4., , , , , and . VLSI-SoC (Selected Papers), volume 373 of IFIP Advances in Information and Communication Technology, page 69-99. Springer, (2010)A 1-V CMOS Ultralow-Power Receiver Front End for the IEEE 802.15.4 Standard Using Tuned Passive Mixer Output Pole., , , , and . VLSI-SoC (Selected Papers), volume 373 of IFIP Advances in Information and Communication Technology, page 1-21. Springer, (2010)A New Improved First-Order Approximate Decorrelating Detector for DS-CDMA Communication Systems., and . Wirel. Pers. Commun., 16 (3): 221-228 (2001)Fully integrated CMOS fractional-N frequency divider for wide-band mobile applications with spurs reduction., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 52-I (6): 1042-1048 (2005)A 1-V CMOS ultralow-power receiver front end for the IEEE 802.15.4 standard using tuned passive mixer output pole., , , , and . VLSI-SoC, page 381-386. IEEE, (2010)A CMOS Mixed-Mode Sample-and-Hold Circuit for Pipelined ADCs., , and . VLSI-SoC (Selected Papers), volume 249 of IFIP, page 81-99. Springer, (2006)A 200-MHz CMOS Mixed-Mode Sample-and-Hold Circuit for Pipelined ADCs., , and . VLSI-SoC, page 352-356. IEEE, (2006)A modified architecture used for input matching in CMOS low-noise amplifiers., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 52-II (11): 784-788 (2005)Design of quarter-wavelength resonator filters with coupling controllable paths., , , , , , and . APCCAS, page 248-251. IEEE, (2012)Performance analysis of adaptive MMSE reception for DS-CDMA in flat Nakagami fading channels., and . IEEE Trans. Veh. Technol., 49 (2): 561-564 (2000)