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Space-time codes with bit interleaving., , , , , and . GLOBECOM, page 1088-1092. IEEE, (2001)Improving performance of a space-time turbo code in a Rayleigh fading channel., , , and . VTC Fall, page 3-7. IEEE, (2001)600 MHz DSP for baseband processing in 3G base stations., , , , and . CICC, page 393-396. IEEE, (2002)Top-Down Design Using Cycle Based Simulation: an MPEG A/V Decoder Example., , , and . Great Lakes Symposium on VLSI, page 400-. IEEE Computer Society, (1998)A Usable Circuit Optimizer for Designers., , , , , and . ICCAD, page 290-293. IEEE Computer Society, (1990)A Study of Variance Reduction Techniques for Estimating Circuit Yields., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2 (3): 180-192 (1983)Direct circuit simulation algorithms for parallel processing VLSI., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 10 (6): 714-725 (1991)SPIDER -- A CAD System for Modeling VLSI Metallization Patterns., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 6 (6): 1023-1031 (1987)An Integrated and Efficient Approach for MOS VLSI Statistical Circuit Design., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 5 (1): 5-14 (1986)Parametric yield optimization for MOS circuit blocks., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 7 (6): 645-658 (1988)