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An Unconstrained Architecture for High-Order Sigma Delta Force-Feedback Inertial Sensors., , and . ISCAS, page 3063-3066. IEEE, (2007)Design of double-sampling ΣΔ modulation A/D converters with bilinear integrators., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 52-I (4): 715-722 (2005)A 1.8-pJ/b, 12.5-25-Gb/s Wide Range All-Digital Clock and Data Recovery Circuit., , , , , , and . IEEE J. Solid State Circuits, 53 (2): 470-483 (2018)A 5-MHz 11-Bit Self-Oscillating Sigma Delta Modulator With a Delay-Based Phase Shifter in 0.025 mm 2., and . IEEE J. Solid State Circuits, 46 (8): 1919-1927 (2011)A 250-kHz 94-dB double-sampling ΣΔ modulation A/D converter with a modified noise transfer function., , and . IEEE J. Solid State Circuits, 38 (10): 1657-1662 (2003)A 13.5-b 1.2-V micropower extended counting A/D converter., , and . IEEE J. Solid State Circuits, 36 (2): 176-183 (2001)The Nyquist Criterion: A Useful Tool for the Robust Design of Continuous-Time SigmaDelta Modulators., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 57-II (6): 416-420 (2010)An On-Line Calibration Technique for Mismatch Errors in High-Speed DACs., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 55-I (7): 1873-1883 (2008)A Rigorous Approach to the Robust Design of Continuous-Time Sigma-Delta Modulators., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 58-I (12): 2829-2837 (2011)Analytical Expressions for the Distortion of Asynchronous Sigma-Delta Modulators., , and . IEEE Trans. Circuits Syst. II Express Briefs, 60-II (8): 472-476 (2013)