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Disambiguation of "Reviriego, Pedro"

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Attacking the Privacy of Approximate Membership Check Filters by Positive Concentration.

, , , , , and . IEEE Trans. Computers, 72 (5): 1409-1419 (May 2023)

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Benno Pedrotti

Mario Pedroso

Luicy Pedroza Espinoza

Claudia Pedroni

Francisco Pedrosa Gil

 

Other publications of authors with the same name

A Fingerprint-based Bloom Filter with Deletion Capabilities., , , and . EuCNC, page 453-458. IEEE, (2019)Soft error tolerant Content Addressable Memories (CAMs) using error detection codes and duplication., , , , and . Microprocess. Microsystems, 37 (8-D): 1103-1107 (2013)A method to eliminate the event accumulation problem from a memory affected by multiple bit upsets., and . Microelectron. Reliab., 49 (7): 707-715 (2009)Mitigation of permanent faults in adaptive equalizers., , and . Microelectron. Reliab., 51 (3): 703-710 (2011)Implementing Double Error Correction Orthogonal Latin Squares Codes in SRAM-based FPGAs., , and . Microelectron. Reliab., (2016)Reliability analysis of memories protected with BICS and a per-word parity bit., , and . ACM Trans. Design Autom. Electr. Syst., 15 (2): 18:1-18:15 (2010)Mitigating the effects of large multiple cell upsets (MCUs) in memories., , , , and . ACM Trans. Design Autom. Electr. Syst., 16 (4): 45:1-45:10 (2011)HyperLogLog (HLL) Security: Inflating Cardinality Estimates., , and . CoRR, (2020)Scheme for periodical concurrent fault detection in parallel CRC circuits., , , , and . IET Comput. Digit. Tech., 14 (2): 80-85 (2020)A Methodology for the Design of Fault Tolerant Parallel Digital Channelizers on SRAM-FPGAs., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 70 (5): 2003-2015 (May 2023)