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Disambiguation of "Yin, Shouyi"

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A Survey of Coarse-Grained Reconfigurable Architecture and Design: Taxonomy, Challenges, and Applications.

, , , , , , , and . ACM Comput. Surv., 52 (6): 118:1-118:39 (2020)

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Shouyi Zhang

Shouyi Zhang

Lu Yin

Renfu Yin

Zhihong Yin

 

Other publications of authors with the same name

Extending lifetime of battery-powered coarse-grained reconfigurable computing platforms., , , and . DATE, page 1-6. European Design and Automation Association, (2014)An uneven-dual-core processor based mobile platform for facilitating the collaboration among various embedded electronic devices., , , , and . IEEE Trans. Consumer Electronics, 60 (1): 137-145 (2014)A reconfigurable multi-processor SoC for media applications., , , , , and . ISCAS, page 2011-2014. IEEE, (2010)Constructing Concurrent Data Structures on FPGA with Channels., , , , and . FPGA, page 172-177. ACM, (2019)Efficient memory partitioning for parallel data access in multidimensional arrays., , , , and . DAC, page 160:1-160:6. ACM, (2015)Disturbance Aware Memory Partitioning for Parallel Data Access in STT-RAM., , and . DAC, page 84:1-84:6. ACM, (2017)Reconfigurable Architecture for Neural Approximation in Multimedia Computing., , , , and . IEEE Trans. Circuits Syst. Video Techn., 29 (3): 892-906 (2019)A Novel Composite Method to Accelerate Control Flow on Reconfigurable Architecture (Abstract Only)., , , , and . FPGA, page 270. ACM, (2015)Anole: A Highly Efficient Dynamically Reconfigurable Crypto-Processor for Symmetric-Key Algorithms., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (12): 3081-3094 (2018)Data-Flow Graph Mapping Optimization for CGRA With Deep Reinforcement Learning., , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38 (12): 2271-2283 (2019)