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Disambiguation of "Koibuchi, Michihiro"

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Switch-tagged VLAN Routing Methodology for PC Clusters with Ethernet.

, , , and . ICPP, page 479-486. IEEE Computer Society, (2006)

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Michihiro Saito

 

Other publications of authors with the same name

AxNoC: Low-power Approximate Network-on-Chips using Critical-Path Isolation., , , , and . NOCS, page 6:1-6:8. IEEE, (2018)A Virtual-Channel Free Mapping for Application-Specific On-Chip Torus Networks., , and . PDCS, page 24-31. ISCA, (2006)Scalable Low-Latency Inter-FPGA Networks., , , , and . IPDPS, page 234-245. IEEE, (2022)Layout-conscious random topologies for HPC off-chip interconnects., , , and . HPCA, page 484-495. IEEE Computer Society, (2013)Efficient Scheduling Algorithms on Bandwidth Reservation Service of Internet Using Metaheuristics., , , , , and . ISDA, page 683-688. IEEE Computer Society, (2009)Ultra Fine-Grained Run-Time Power Gating of On-chip Routers for CMPs., , , , , and . NOCS, page 61-68. IEEE Computer Society, (2010)On-Chip Decentralized Routers with Balanced Pipelines for Avoiding Interconnect Bottleneck., , , , and . NOCS, page 16:1-16:8. ACM, (2015)3D Layout of Spidergon, Flattened Butterfly and Dragonfly on a Chip Stack with Inductive Coupling Through Chip Interface., , , , and . ISPAN-FCST-ISCC, page 52-59. IEEE Computer Society, (2017)Routing Algorithms Based on 2D Turn Model for Irregular Networks., , , and . ISPAN, page 289-294. IEEE Computer Society, (2002)Enabling Ideal Job Mapping on Wireless Supercomputers and Datacenters., , and . CANDAR, page 357-363. IEEE Computer Society, (2015)