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Statistical Analysis of Bit-Errors Distribution for Reliability of 3-D NAND Flash Memories.

, , , , , , , , and . IRPS, page 1-5. IEEE, (2020)

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Layer-Aware Program-and-Read Schemes for 3D Stackable Vertical-Gate BE-SONOS NAND Flash Against Cross-Layer Process Variations., , , , , , , , , and 6 other author(s). IEEE J. Solid State Circuits, 50 (6): 1491-1501 (2015)Chip-level characterization and RTN-induced error mitigation beyond 20nm floating gate flash memory., , , , , , , , , and 1 other author(s). IRPS, page 6-1. IEEE, (2018)Investigation of data pattern effects on nitride charge lateral migration in a charge trap flash memory by using a random telegraph signal method., , , , , , , and . IRPS, page 6. IEEE, (2018)Study of the Walk-Out Effect of Junction Breakdown Instability of the High-Voltage Depletion-Mode N-Channel MOSFET for NAND Flash Peripheral Device and an Efficient Layout Solution., , , , , , , , and . IRPS, page 1-6. IEEE, (2020)Chip Demonstration of a High-Density (43Gb) and High-Search-Bandwidth (300Gb/s) 3D NAND Based In-Memory Search Accelerator for Ternary Content Addressable Memory (TCAM) and Proximity Search of Hamming Distance., , , , , , and . VLSI Technology and Circuits, page 1-2. IEEE, (2023)First Study of P-Channel Vertical Split-Gate Flash Memory Device with Various Electron and Hole Injection Methods and Potential Future Possibility to Enable Functional Memory Circuits., , , , , and . IMW, page 1-4. IEEE, (2021)Electrical method to localize the high-resistance of nanoscale CoSi2 word-line for OTP memories., , , , , , , and . IRPS, page 6. IEEE, (2018)First Experimental Study of Floating-Body Cell Transient Reliability Characteristics of Both N- and P-Channel Vertical Gate-All-Around Devices with Split-Gate Structures., , , , , , , and . IRPS, page 7. IEEE, (2022)In-Memory Approximate Computing Architecture Based on 3D-NAND Flash Memories., , , , , , , , and . VLSI Technology and Circuits, page 270-271. IEEE, (2022)Introduction of Non-Volatile Computing In Memory (nvCIM) by 3D NAND Flash for Inference Accelerator of Deep Neural Network (DNN) and the Read Disturb Reliability Evaluation : (Invited Paper)., , , and . IRPS, page 1-6. IEEE, (2020)