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A methodology for verifying SysML requirements using activity diagrams.

, , and . Innov. Syst. Softw. Eng., 13 (1): 19-33 (2017)

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Verification of Real-Time Systems: Application to the Transportation Domain., and . NTMS, page 1-5. IEEE, (2009)Model Driven Approach to Design an Automotive CPS with SysReo Language., , and . MobiWac, page 97-104. ACM, (2022)Assembling Components using SysML with Non-Functional Requirements., , and . FESCA, volume 295 of Electronic Notes in Theoretical Computer Science, page 31-47. Elsevier, (2012)Verification and Validation of Meta-model based Transformation from SysML to VHDL-AMS., , , and . MODELSWARD, page 123-128. SciTePress, (2013)Recursive ECATNets-based approach for formally verifying System Modelling Language activity diagrams., , , and . IET Softw., 9 (5): 119-128 (2015)Petri Nets Based Approach for Modular Verification of SysML Requirements on Activity Diagrams., , and . PNSE @ Petri Nets, volume 1160 of CEUR Workshop Proceedings, page 233-248. CEUR-WS.org, (2014)Towards the Formal Verification of SysML Specifications: Translation of Activity Diagrams into Modular Petri Nets., , and . ACIT-CSI, page 509-516. IEEE, (2015)Java Card Code Generation from B Specifications., , , and . ICFEM, volume 2885 of Lecture Notes in Computer Science, page 306-318. Springer, (2003)Modular and Distributed Verification of SysML Activity Diagrams., , and . MODELSWARD, page 202-205. SciTePress, (2013)Tooled Process for Early Validation of SysML Models Using Modelica Simulation., , , and . FSEN, volume 9392 of Lecture Notes in Computer Science, page 230-237. Springer, (2015)