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Modeling and Circuit Synthesis for Independently Controlled Double Gate FinFET Devices.

, , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (11): 1957-1966 (2007)

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Modeling and Circuit Synthesis for Independently Controlled Double Gate FinFET Devices., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (11): 1957-1966 (2007)Gate leakage reduction for scaled devices using transistor stacking., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 11 (4): 716-730 (2003)