( en | de | ru )

 

Disambiguation of "Jr., Earl E. Swartzlander"

Author of the publication

copydeleteadd this publication to your clipboard
Multiply-Accumulate Architecture for a Special Class of Optimal Extension Fields.

, and . ASAP, page 134-139. IEEE Computer Society, (2005)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Dent Earl

Eugenia Earle

Kathleen Early

Foued Jrad

Earl Gumbs

 

Other publications of authors with the same name

The hazard-free superscalar pipeline fast fourier transform algorithm and architecture., , and . VLSI-SoC, page 194-199. IEEE, (2007)Editorial.. VLSI Signal Processing, 1 (1): 5 (1989)VLSI Concurrent Error Correcting Adders and Multipliers., and . DFT, page 287-294. IEEE Computer Society, (1993)Parallel Counters.. IEEE Trans. Computers, 22 (11): 1021-1024 (1973)The Hazard-Free Superscalar Pipeline Fast Fourier Transform Architecture and Algorithm., , and . VLSI-SoC (Selected Papers), volume 291 of IFIP, page 1-22. Springer, (2007)Dadda Multiplier designs using memristors., and . ICICDT, page 1-4. IEEE, (2017)A Spanning Tree Carry Lookahead Adder., and . IEEE Trans. Computers, 41 (8): 931-939 (1992)A systolic array for 2-D DFT and 2-D DCT., and . ASAP, page 123-131. IEEE, (1994)The Sign/Logarithm Number System., and . IEEE Trans. Computers, 24 (12): 1238-1242 (1975)Quantifying academic placer performance on custom designs., , , , , and . ISPD, page 91-98. ACM, (2011)