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Circuit implications of gate oxide breakdown., , и . Microelectron. Reliab., 43 (8): 1193-1197 (2003)A critical analysis of sampling-based reconstruction methodology for dielectric breakdown systems (BEOL/MOL/FEOL)., , , , , и . IRPS, стр. 2. IEEE, (2015)The negative bias temperature instability in MOS devices: A review., и . Microelectron. Reliab., 46 (2-4): 270-286 (2006)Influence and model of gate oxide breakdown on CMOS inverters., , , , и . Microelectron. Reliab., 43 (9-11): 1439-1444 (2003)Dependence of Post-Breakdown Conduction on Gate Oxide Thickness., , и . Microelectron. Reliab., 42 (9-11): 1481-1484 (2002)Impacts of NBTI and PBTI on SRAM static/dynamic noise margins and cell failure probability., , , , , и . Microelectron. Reliab., 49 (6): 642-649 (2009)The resilience wall: Cross-layer solution strategies., , , , , , , , , и 3 other автор(ы). VLSI-DAT, стр. 1-11. IEEE, (2014)Analyzing path delays for accelerated testing of logic chips., , , , , , , и . IRPS, стр. 6. IEEE, (2015)Comprehensive Methodology for Multiple Spots Competing Progressive Breakdown for BEOL/FEOL Applications., , , и . IRPS, стр. 1-8. IEEE, (2019)Long Term NBTI Relaxation Under AC and DC Biased Stress and Recovery., , , и . IRPS, стр. 1-5. IEEE, (2019)