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A compact ultra low-power pulse delay and extension circuit for neuromorphic processors., , and . BioCAS, page 1-4. IEEE, (2017)Neural State Machines for Robust Learning and Control of Neuromorphic Agents., , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 9 (4): 679-689 (2019)Robust Learning and Recognition of Visual Patterns in Neuromorphic Electronic Agents., , , , , and . AICAS, page 71-75. IEEE, (2019)Live Demonstration: Face Recognition on an Ultra-Low Power Event-Driven Convolutional Neural Network ASIC., , , , , and . CVPR Workshops, page 1680-1681. Computer Vision Foundation / IEEE, (2019)A Stack Cache for Real-Time Systems., and . ISORC, page 150-157. IEEE Computer Society, (2016)Speck: A Smart event-based Vision Sensor with a low latency 327K Neuron Convolutional Neuronal Network Processing Pipeline., , , , , , , , , and 1 other author(s). CoRR, (2023)Yak: An Asynchronous Bundled Data Pipeline Description Language., , and . ASYNC, page 34-41. IEEE, (2023)DYNAP-SE2: a scalable multi-core dynamic neuromorphic asynchronous spiking neural network processor., , , , , , and . CoRR, (2023)DYNAP-SE2: a scalable multi-core dynamic neuromorphic asynchronous spiking neural network processor., , , , , , and . Neuromorph. Comput. Eng., 4 (1): 14003 (March 2024)Stack Caching Using Split Data Caches., and . ISORC Workshops, page 66-73. IEEE Computer Society, (2015)