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FPRaker: A Processing Element For Accelerating Neural Network Training., , , , , , , and . CoRR, (2020)Slice-processors: an implementation of operation-based prediction., , and . ICS, page 321-334. ACM, (2001)Practical off-chip meta-data for temporal memory streaming., , , , and . HPCA, page 79-90. IEEE Computer Society, (2009)Characterizing the performance benefits of fused CPU/GPU systems using FusionSim., , and . DATE, page 685-688. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Loom: Exploiting Weight and Activation Precisions to Accelerate Convolutional Neural Networks., , , and . CoRR, (2017)Asymmetric-frequency clustering: a power-aware back-end for high-performance processors., and . ISLPED, page 255-258. ACM, (2002)Instruction flow-based front-end throttling for power-aware high-performance processors., and . ISLPED, page 16-21. ACM, (2001)SEPAS: a highly accurate energy-efficient branch predictor., and . ISLPED, page 38-43. ACM, (2004)Accelerating Image-Sensor-Based Deep Learning Applications., , , , , , , , , and 1 other author(s). IEEE Micro, 39 (5): 26-35 (2019)Two-Stage, Pipelined Register Renaming., , and . IEEE Trans. Very Large Scale Integr. Syst., 19 (10): 1926-1931 (2011)