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Storage and Caching: Synthesis of Flow-Based Microfluidic Biochips., , , и . IEEE Des. Test, 32 (6): 69-75 (2015)Guest Editors' Introduction: Microfluidics: Design and Test Solutions for Enabling Biochemistry on a Chip., и . IEEE Des. Test, 32 (6): 6-7 (2015)A Network-Flow Based Pin-Count Aware Routing Algorithm for Broadcast-Addressing EWOD Chips., , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 30 (12): 1786-1799 (2011)Lookup Table-Based Fast Reliability-Aware Sample Preparation Using Digital Microfluidic Biochips., , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (10): 2708-2721 (2020)A logic integrated optimal pin-count design for digital microfluidic biochips., , и . DATE, стр. 1-6. European Design and Automation Association, (2014)Timing-aware clock gating of pulsed-latch circuits for low power design., и . VLSI-DAT, стр. 1-4. IEEE, (2013)A nonlinear optimization methodology for resistor matching in analog integrated circuits., , и . VLSI-DAT, стр. 1-4. IEEE, (2012)Triangle-based process hotspot classification with dummification in EUVL., , , и . VLSI-DAT, стр. 1-4. IEEE, (2014)Load-balanced clock tree synthesis with adjustable delay buffer insertion for clock skew reduction in multiple dynamic supply voltage designs., , , и . ACM Trans. Design Autom. Electr. Syst., 17 (3): 34:1-34:22 (2012)Reliability-aware synthesis for flow-based microfluidic biochips by dynamic-device mapping., , , и . DAC, стр. 141:1-141:6. ACM, (2015)