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Topology Synthesis of Cascaded Crossbar Switches.

, , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 28 (6): 926-930 (2009)

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Automatic source code specialization for energy reduction., , and . ISLPED, page 80-83. ACM, (2001)A Study of Data Layout in Multi-channel Processing-In-Memory Architecture., , , and . ICSCA, page 134-138. ACM, (2018)Asymmetric Slew Logic Threshold Method on Near Threshold Region., , , and . ICSCA, page 317-321. ACM, (2018)EXTREME: Exploiting Page Table for Reducing Refresh Power of 3D-Stacked DRAM Memory., , , , , and . IEEE Trans. Computers, 67 (1): 32-44 (2018)Energy-Optimal Dynamic Thermal Management: Computation and Cooling Power Co-Optimization., , , and . IEEE Trans. Ind. Informatics, 6 (3): 340-351 (2010)GPU-based acceleration of an RNA tertiary structure prediction algorithm., , , , and . Comput. Biol. Medicine, 43 (8): 1011-1022 (2013)Multitoken-Based Power Management for NAND Flash Storage Devices., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (10): 2898-2910 (2020)High-Speed Post-Layout Logic Simulation Using Quasi-Static Clock Event Evaluation., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 28 (8): 1274-1278 (2009)Scalable QoS-Aware Memory Controller for High-Bandwidth Packet Memory., and . IEEE Trans. Very Large Scale Integr. Syst., 16 (3): 289-301 (2008)An effective pre-store/pre-load method exploiting intra-request idle time of NAND flash-based storage devices., , , , , and . Microprocess. Microsystems, (2017)