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A Hybrid Embedded Multichannel Test Compression Architecture for Low-Pin Count Test Environments in Safety-Critical Systems., , and . ITC-Asia, page 115-120. IEEE, (2019)On enabling diagnosis for 1-Pin Test fails in an industrial flow., , , , and . ASP-DAC, page 233-238. IEEE, (2018)Time and Area Optimized Testing of Automotive ICs., , , , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 29 (1): 76-88 (2021)Test Time and Area Optimized BrST Scheme for Automotive ICs., , , , , , , , , and . ITC, page 1-10. IEEE, (2019)Hybrid Architecture for Embedded Test Compression to Process Rejected Test Patterns., , and . ETS, page 1-2. IEEE, (2019)A Scalable Design Flow for Performance Monitors Using Functional Path Ring Oscillators., , , , and . ITC, page 299-303. IEEE, (2021)Performance Screening Using Functional Path Ring Oscillators., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 31 (6): 711-724 (June 2023)A lightweight X-masking scheme for IoT designs., , and . ITC-Asia, page 77-82. IEEE, (2017)An efficient High-Volume Production Performance Screening using On-Chip Ring Oscillators., , , , and . DFT, page 1-6. IEEE, (2023)A Novel LBIST Signature Computation Method for Automotive Microcontrollers using a Digital Twin., , and . VTS, page 1-6. IEEE, (2023)