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Theoretical bounds for switching activity analysis in finite-state machines.

, , and . IEEE Trans. Very Large Scale Integr. Syst., 8 (3): 335-339 (2000)

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Key Research Problems in NoC Design: A Holistic Perspective, , and . Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, page 69--74. New York, NY, USA, ACM, (2005)Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures, and . Lecture Notes in Electrical Engineering Springer, (2013)Hierarchical Adaptive Dynamic Power Management., , and . IEEE Trans. Computers, 54 (4): 409-420 (2005)Challenges and Promising Results in NoC Prototyping Using FPGAs., , , , , , and . IEEE Micro, 27 (5): 86-95 (2007)Efficient Power Estimation for Highly Correlated Input Streams., , and . DAC, page 628-634. ACM Press, (1995)Sequence Compaction for Probabilistic Analysis of Finite-State Machines., , and . DAC, page 12-15. ACM Press, (1997)Incremental run-time application mapping for homogeneous NoCs with multiple voltage levels., and . CODES+ISSS, page 161-166. ACM, (2007)Sequence compaction for power estimation: theory and practice., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 18 (7): 973-993 (1999)Information theoretic measures for power analysis logic design., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 15 (6): 599-610 (1996)Designing Heterogeneous Embedded Network-on-Chip Platforms With Users in Mind., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 29 (9): 1301-1314 (2010)