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A 3D multi-layer CMOS-RRAM accelerator for neural network., , , , , , and . 3DIC, page 1-5. IEEE, (2016)An energy-efficient and high-throughput bitwise CNN on sneak-path-free digital ReRAM crossbar., , , , , , and . ISLPED, page 1-6. IEEE, (2017)Distributed In-Memory Computing on Binary RRAM Crossbar., , , , and . JETC, 13 (3): 36:1-36:18 (2017)AFPR-CIM: An Analog-Domain Floating-Point RRAM-based Compute-In-Memory Architecture with Dynamic Range Adaptive FP-ADC., , , , , and . CoRR, (2024)DW-AES: A Domain-Wall Nanowire-Based AES for High Throughput and Energy-Efficient Data Encryption in Non-Volatile Memory., , , and . IEEE Trans. Inf. Forensics Secur., 11 (11): 2426-2440 (2016)Revisiting Pass-Transistor Logic Styles in a 12nm FinFET Technology Node., , , , , , and . DATE, page 1083-1084. IEEE, (2022)A Low-Power High-Throughput In-Memory CMOS-ReRAM Accelerator for Large-Scale Deep Residual Neural Networks., , , , , and . ASICON, page 1-4. IEEE, (2019)On-line machine learning accelerator on digital RRAM-crossbar., , and . ISCAS, page 113-116. IEEE, (2016)VECBEE: A Versatile Efficiency-Accuracy Configurable Batch Error Estimation Method for Greedy Approximate Logic Synthesis., , , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (11): 5085-5099 (2022)Non-Volatile In-Memory Computing by Spintronics, , and . Synthesis Lectures on Emerging Engineering Technologies Morgan & Claypool Publishers, (2016)