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OWL: cooperative thread array aware scheduling techniques for improving GPGPU performance.

, , , , , , , and . ASPLOS, page 395-406. ACM, (2013)

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Decoupling GPU Programming Models from Resource Management for Enhanced Programming Ease, Portability, and Performance., , , , , , , , and . CoRR, (2018)Exploiting Core Criticality for Enhanced GPU Performance., , , , , , and . SIGMETRICS, page 351-363. ACM, (2016)Cache revive: architecting volatile STT-RAM caches for enhanced performance in CMPs., , , , , , and . DAC, page 243-252. ACM, (2012)BCoal: Bucketing-Based Memory Coalescing for Efficient and Secure GPUs., , and . HPCA, page 570-581. IEEE, (2020)A case for core-assisted bottleneck acceleration in GPUs: enabling flexible data compression with assist warps., , , , , , , , and . ISCA, page 41-53. ACM, (2015)Orchestrated scheduling and prefetching for GPGPUs., , , , , , and . ISCA, page 332-343. ACM, (2013)Opportunistic computing in GPU architectures., , , , , , , and . ISCA, page 210-223. ACM, (2019)Architecting SOT-RAM Based GPU Register File., , , , , , and . ISVLSI, page 38-44. IEEE Computer Society, (2017)Trading cache hit rate for memory performance., , , , , and . PACT, page 357-368. ACM, (2014)Fault Site Pruning for Practical Reliability Analysis of GPGPU Applications., , , and . MICRO, page 749-761. IEEE Computer Society, (2018)