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Mapping and configuration methods for multi-use-case networks on chips., , , , and . ASP-DAC, page 146-151. IEEE, (2006)Programming and analysing scenario-aware dataflow on a multi-processor platform., , and . DATE, page 876-881. IEEE, (2017)Conservative open-page policy for mixed time-criticality memory controllers., , and . DATE, page 525-530. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Time synchronization for an emulated CAN device on a Multi-Processor System on Chip., , , and . Microprocess. Microsystems, (2017)Maximizing the Number of Good Dies for Streaming Applications in NoC-Based MPSoCs Under Process Variation., , , and . ACM Trans. Embed. Comput. Syst., 14 (4): 83:1-83:26 (2015)C-HEAP: A Heterogeneous Multi-Processor Architecture Template and Scalable and Flexible Protocol for the Design of Embedded Signal Processing Systems., , , , , , , and . Des. Autom. Embed. Syst., 7 (3): 233-270 (2002)A Unified Approach to Mapping and Routing on a Network-on-Chip for Both Best-Effort and Guaranteed Service Traffic., , and . VLSI Design, (2007)Hardware Implementation of Iterative Projection Aggregation Decoding for Reed-Muller Codes., , and . CoRR, (2022)Wrapper design for the reuse of a bus, network-on-chip, or other functional interconnect as test access mechanism., , , , and . IET Comput. Digit. Tech., 1 (3): 197-206 (2007)A unified execution model for multiple computation models of streaming applications on a composable MPSoC., , and . J. Syst. Archit., 59 (10-C): 1032-1046 (2013)