Author of the publication

Accelerate Hardware Logging for Efficient Crash Consistency in Persistent Memory.

, , , and . DATE, page 388-393. IEEE, (2022)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Exploiting subarrays inside a bank to improve phase change memory performance., and . DATE, page 386-391. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Efficient Hardware-Assisted Crash Consistency in Encrypted Persistent Memory., , , and . DATE, page 750-755. IEEE, (2020)Global Backfilling Scheduling in Multiclusters.. AACC, volume 3285 of Lecture Notes in Computer Science, page 232-239. Springer, (2004)A hybrid memory architecture supporting fine-grained data migration., , , , and . Frontiers Comput. Sci., 18 (2): 182103 (April 2024)Efficient Hardware-assisted Out-place Update for Persistent Memory., , , and . DATE, page 507-512. IEEE, (2021)Efficient Hardware Redo Logging for Secure Persistent Memory., , , and . HPCC/DSS/SmartCity/DependSys, page 41-48. IEEE, (2021)Improving the Performance of NVM Crash Consistency under Multicore., , , and . ICCD, page 561-564. IEEE, (2020)SFMapReduce: An optimized MapReduce framework for Small Files., , , , and . NAS, page 23-32. IEEE Computer Society, (2015)An Energy-Oriented Evaluation of Buffer Cache Algorithms Using Parallel I/O Workloads., , and . IEEE Trans. Parallel Distributed Syst., 19 (11): 1565-1578 (2008)Trade-off Between Hit Rate and Hit Latency for Optimizing DRAM Cache., , , and . IEEE Trans. Emerg. Top. Comput., 9 (1): 55-64 (2021)