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High-Voltage CMOS Controller for Microfluidics., , , , and . IEEE Trans. Biomed. Circuits Syst., 3 (2): 89-96 (2009)Frequency Synthesis Based on A Novel Differential Locking Mechanism., and . ISCAS, page 1-5. IEEE, (2018)Low-power static and dynamic high-voltage CMOS level-shifter circuits., , , , , , and . ISCAS, page 1946-1949. IEEE, (2008)Efficient Implementation of Low-Density Parity-Check Convolutional Code Encoders With Built-In Termination., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 55-I (11): 3628-3640 (2008)Design of a 3-D fully depleted SOI computational RAM., , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 13 (3): 358-369 (2005)Efficient Encoding and Termination of Low-Density Parity-Check Convolutional Codes., , , and . GLOBECOM, IEEE, (2006)Test and Characterization of a Variable-Capacity Multilevel DRAM., , , , , , , , , and . VTS, page 189-197. IEEE Computer Society, (2005)Coresidual alias-locked loops., and . ISCAS, page 9-12. IEEE, (2016)Design and evaluation of stochastic FIR filters., , , and . PACRIM, page 407-412. IEEE, (2015)Fault Modeling and Pattern-Sensitivity Testing for a Multilevel DRAM., , , , and . MTDT, page 117-122. IEEE Computer Society, (2002)