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An opportunistic prediction-based thread scheduling to maximize throughput/watt in AMPs.

, , , and . PACT, page 63-72. IEEE Computer Society, (2013)

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A Hardware Framework for Yield and Reliability Enhancement in Chip Multiprocessors., , and . ACM Trans. Embed. Comput. Syst., 14 (1): 12:1-12:26 (2015)Optical Lithography Simulation with Focus Variation using Wavelet Transform., and . VLSI Design, page 387-392. IEEE Computer Society, (2010)A study on performance benefits of core morphing in an asymmetric multicore processor., , , and . ICCD, page 17-22. IEEE Computer Society, (2010)A study on polymorphing superscalar processor dynamically to improve power efficiency., , , , and . ISVLSI, page 46-51. IEEE Computer Socity, (2013)Model based double patterning lithography (DPL) and simulated annealing (SA)., and . ISQED, page 376-383. IEEE, (2011)Does the Sharing of Execution Units Improve Performance/Power of Multicores?, , and . ACM Trans. Embed. Comput. Syst., 14 (1): 17:1-17:24 (2015)Reducing Energy per Instruction via Dynamic Resource Allocation and Voltage and Frequency Adaptation in Asymmetric Multicores., , , and . ISVLSI, page 436-441. IEEE Computer Society, (2014)An Architecture to Enable Lifetime Full Chip Testability in Chip Multiprocessors., , and . PACT, page 219. IEEE Computer Society, (2011)On dynamic polymorphing of a superscalar core for improving energy efficiency., , , , and . ICCD, page 495-498. IEEE Computer Society, (2013)An Online Mechanism to Verify Datapath Execution Using Existing Resources in Chip Multiprocessors., and . Asian Test Symposium, page 161-166. IEEE Computer Society, (2011)