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TS-Router: On maximizing the Quality-of-Allocation in the On-Chip Network.

, , , , , and . HPCA, page 390-399. IEEE Computer Society, (2013)

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NoΔ: Leveraging delta compression for end-to-end memory access in NoC based multicores., , , and . ASP-DAC, page 586-591. IEEE, (2014)NVMain 2.0: A User-Friendly Memory Simulator to Model (Non-)Volatile Memory Systems., , and . IEEE Comput. Archit. Lett., 14 (2): 140-143 (2015)TS-Router: On maximizing the Quality-of-Allocation in the On-Chip Network., , , , , and . HPCA, page 390-399. IEEE Computer Society, (2013)Design and Analysis of an APU for Exascale Computing., , , , , , , , , and 8 other author(s). HPCA, page 85-96. IEEE Computer Society, (2017)Lost in Abstraction: Pitfalls of Analyzing GPUs at the Intermediate Language Level., , , , , , , , , and 6 other author(s). HPCA, page 608-619. IEEE Computer Society, (2018)A Research Retrospective on AMD's Exascale Computing Journey., , , , , , , , , and 61 other author(s). ISCA, page 81:1-81:14. ACM, (2023)There and Back Again: Optimizing the Interconnect in Networks of Memory Cubes., , , , , and . ISCA, page 678-690. ACM, (2017)Fine-granularity tile-level parallelism in non-volatile memory architecture with two-dimensional bank subdivision., , and . DAC, page 168:1-168:6. ACM, (2016)NVMain: An Architectural-Level Main Memory Simulator for Emerging Non-volatile Memories., and . ISVLSI, page 392-397. IEEE Computer Society, (2012)Modular Routing Design for Chiplet-Based Systems., , , , , , and . ISCA, page 726-738. IEEE Computer Society, (2018)