Author of the publication

Modeling and estimating leakage current in series-parallel CMOS networks.

, , , and . ACM Great Lakes Symposium on VLSI, page 269-274. ACM, (2007)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Fault-tolerant ripple-carry binary adder using partial triple modular redundancy (PTMR)., , and . ISCAS, page 41-44. IEEE, (2015)A multi-story power delivery technique for 3D integrated circuits., , , and . ISLPED, page 57-62. ACM, (2008)A 2.1 pJ/bit, 8 Gb/s Ultra-Low Power In-Package Serial Link Featuring a Time-based Front-end and a Digital Equalizer., , , and . A-SSCC, page 187-190. IEEE, (2018)Guest editors' introduction: Nanoscale Memories Pose Unique Challenges., and . IEEE Des. Test Comput., 28 (1): 6-8 (2011)Silicon Odometer: An On-Chip Reliability Monitor for Measuring Frequency Degradation of Digital Circuits., , and . IEEE J. Solid State Circuits, 43 (4): 874-880 (2008)A Voltage Scalable 0.26 V, 64 kb 8T SRAM With Vmin Lowering Techniques and Deep Sleep Mode., , and . IEEE J. Solid State Circuits, 44 (6): 1785-1795 (2009)Reliable PUF-Based Local Authentication With Self-Correction., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (2): 201-213 (2017)A Counter based ADC Non-linearity Measurement Circuit and Its Application to Reliability Testing., , , , , and . CICC, page 1-4. IEEE, (2019)Leakage Power Analysis and Reduction for Nanoscale Circuits., , , , and . IEEE Micro, 26 (2): 68-80 (2006)SRAM read performance degradation under asymmetric NBTI and PBTI stress: Characterization vehicle and statistical aging data., , and . CICC, page 1-4. IEEE, (2014)