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Disambiguation of "Ferrandi, Fabrizio"

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High-Level Synthesis Developments in the Context of European Space Technology Research (Invited Talk).

, , , , and . PARMA-DITAM, volume 116 of OASIcs, page 1:1-1:12. Schloss Dagstuhl - Leibniz-Zentrum für Informatik, (2024)

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Fabrizio Gabbiani

Fabrizio Catanese

Fabrizio Gabrielli

Fabrizio Arosio

Fabrizio Lindner

 

Other publications of authors with the same name

An Interrupt Controller for FPGA-based Multiprocessors., , , , , , and . ICSAMOS, page 82-87. IEEE, (2007)Hardware DWT accelerator for MultiProcessor System-on-Chip on FPGA., , , , , , and . ICSAMOS, page 107-114. IEEE, (2006)A design methodology to implement memory accesses in high-level synthesis., , and . CODES+ISSS, page 49-58. ACM, (2011)Performance modeling of embedded applications with zero architectural knowledge., and . CODES+ISSS, page 277-286. ACM, (2010)HArtes: Hardware-Software Codesign for Heterogeneous Multicore Platforms., , , , , , , , , and 1 other author(s). IEEE Micro, 30 (5): 88-97 (2010)Bambu: A modular framework for the high level synthesis of memory-intensive applications., and . FPL, page 1-4. IEEE, (2013)Enabling Automated Bug Detection for IP-Based Designs Using High-Level Synthesis., , and . IEEE Des. Test, 35 (5): 54-62 (2018)Symbolic Optimization of FSM Networks Based on Sequential ATPG Techniques., , , , and . DAC, page 467-470. ACM Press, (1996)Reduction of Fault Detection Costs through Testable Design of Sequential Architectures with Signal Feedbacks., , , , , and . DFT, page 223-230. IEEE Computer Society, (1993)An Expert Solution to Functional Testability Analysis of VLSI Circuits., , , , , and . SEKE, page 263-265. Knowledge Systems Institute, (1993)