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Disambiguation of "Ganguly, Amlan"

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POLAR: Performance-aware On-device Learning Capable Programmable Processing-in-Memory Architecture for Low-Power ML Applications.

, , , , and . DSD, page 889-898. IEEE, (2022)

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Amlan Kusum

Julia Amlang

Michael H Amlang

Maud Amlang

Michael Amlang

 

Other publications of authors with the same name

Energy-efficient multicore chip design through cross-layer approach., , , , and . DATE, page 725-730. EDA Consortium San Jose, CA, USA / ACM DL, (2013)A One-to-Many Traffic Aware Wireless Network-in-Package for Multi-Chip Computing Platforms., , , , and . SoCC, page 284-289. IEEE, (2018)Intra-chip Wireless Interconnect: The Road Ahead., , , , , , and . NoCArc@MICRO, page 3:1-3:6. ACM, (2017)An Interconnection Architecture for Seamless Inter and Intra-Chip Communication Using Wireless Links., , and . NOCS, page 2:1-2:8. ACM, (2015)A Traffic-Aware Medium Access Control Mechanism for Energy-Efficient Wireless Network-on-Chip Architectures., , , , , and . CoRR, (2018)W1B: Application specific designs.. SoCC, page 1. IEEE, (2017)Design Space Exploration for Wireless NoCs Incorporating Irregular Network Routing., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 33 (11): 1732-1745 (2014)A 0.36pJ/bit, 17Gbps OOK receiver in 45-nm CMOS for inter and intra-chip wireless interconnects., , , , , and . SoCC, page 132-137. IEEE, (2017)Comparative performance evaluation of wireless and optical NoC architectures., , , and . SoCC, page 487-492. IEEE, (2010)Scalable Hybrid Wireless Network-on-Chip Architectures for Multicore Systems., , , , , and . IEEE Trans. Computers, 60 (10): 1485-1502 (2011)