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Statistical design of a D/A converter based on the current division technique.

, , and . ICECS, page 295-298. IEEE, (1998)

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Functional yield enhancement and statistical design of a low power transconductor., and . ISCAS (2), page 436-439. IEEE, (1999)Robust Design of Basic Low Voltage CMOS Transconductors., , and . J. VLSI Signal Process., 22 (2): 87-102 (1999)An efficient and well-controlled IC system development flow: design approved specification and design guided test plan., and . ISCAS (3), page 2775-2778. IEEE, (2005)CCII-based balanced fully integrated continuous-time filter synthesis: signal-flow graph approach., , , and . ICECS, page 131-133. IEEE, (1998)Next generation wireless-multimedia devices: who is up for the challenge?, , , , , , and . DAC, page 353-354. ACM, (2008)A Fast Analog Circuit Analysis Algorithm for Design Modification and Verification., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 30 (2): 308-313 (2011)Mixed signal and SoC design flow requirements.. ISCAS (6), page 5974-5977. IEEE, (2005)Editorial ISCAS 2006 Special Section on Analog Circuits and Systems., and . IEEE Trans. Circuits Syst. I Regul. Pap., 54-I (1): 191-192 (2007)Guest Editorial - ISCAS 2007., and . IEEE Trans. Circuits Syst. I Regul. Pap., 55-I (3): 713-714 (2008)Linear Transconductors Using Low Voltage Low Power Square-Law Cmos Cells., and . Great Lakes Symposium on VLSI, page 206-209. IEEE Computer Society, (1999)