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Design and implementation of control circuits based on dynamically reconfigurable FPGA.

, and . ICECS, page 527-530. IEEE, (1998)

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The ARPA-MT Embedded SMT Processor and Its RTOS Hardware Accelerator., , and . IEEE Trans. Ind. Electron., 58 (3): 890-904 (2011)The design and implementation of a reconfigurable processor for problems of combinatorial computation., and . J. Syst. Archit., 49 (4-6): 211-226 (2003)Synthesis Tools and Design Environment for Dynamically Reconfigurable FPGAs., , , , , , , and . SBCCI, page 46-50. IEEE Computer Society, (1998)Development System for FPGA-Based Digital Circuits., , , , , , , , and . FCCM, page 266-267. IEEE Computer Society, (1999)A Dynamically Reconfigurable Accelerator for Operations over Boolean and Ternary Vectors., , , and . DSD, page 222-229. IEEE Computer Society, (2003)Software parallel implementation of a DS-CDMA Multiuser Detector., , and . SoftCOM, page 356-360. IEEE, (2015)Design and implementation of control circuits based on dynamically reconfigurable FPGA., and . ICECS, page 527-530. IEEE, (1998)Design and Implementation of Reconfigurable Processor for Problems of Combinatorial Computations., and . DSD, page 112-119. IEEE Computer Society, (2001)FPGA-Based Implementation of Genetic Algorithm for the Traveling Salesman Problem and Its Industrial Application., and . IEA/AIE, volume 2358 of Lecture Notes in Computer Science, page 77-87. Springer, (2002)Sparc® architecture, assembly language programming, & C : Richard P Paul Prentice-Hall Inc, Englewood Cliffs, NJ, USA (1994) ISBN 0 13 876889 7, £34.75, 448 pp.. Microprocess. Microsystems, 19 (2): 105-106 (1995)