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Disambiguation of "He, Lei"

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Effective congestion reduction for IC package substrate routing.

, , , , , and . ACM Trans. Design Autom. Electr. Syst., 15 (3): 27:1-27:21 (2010)

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Lei Lei

Lei Lei

Lei Wang

Lei Wang

Lei Zhao

 

Other publications of authors with the same name

A Coarse-to-fine Classification for Motion Blur Kernel Size Estimation with Cascaded Neural Networks., , and . ASICON, page 1-4. IEEE, (2019)The Compound Binomial Risk Model with Randomly Charging Premiums and Paying Dividends to Shareholders., and . J. Appl. Math., (2013)Fast dual-vdd buffering based on interconnect prediction and sampling., , , and . SLIP, page 95-102. ACM, (2007)FPGA area reduction by multi-output function based sequential resynthesis., , , and . DAC, page 24-29. ACM, (2008)Simultaneous time slack budgeting and retiming for dual-Vdd FPGA power reduction., , , and . DAC, page 478-483. ACM, (2006)Rewiring for robustness., , , and . DAC, page 469-474. ACM, (2010)Modeling and synthesis of multiport transmission line for multichannel communication., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (9): 1664-1676 (2006)Wideband passive multiport model order reduction and realization of RLCM circuits., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (8): 1496-1509 (2006)Dual-Vdd Interconnect With Chip-Level Time Slack Allocation for FPGA Power Reduction., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (10): 2023-2034 (2006)Theory and algorithm of local-refinement-based optimization with application to device and interconnect sizing., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 18 (4): 406-420 (1999)