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Fault injection methodology for single event effects on clock-gated ASICs.

, and . LATS, page 1-4. IEEE, (2017)

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Investigating Floating-Point Implementations in a Softcore GPU under Radiation-Induced Faults., , , , , , and . ICECS, page 1-4. IEEE, (2020)Exploiting approximate computing for low-cost fault tolerant architectures., , , , and . SBCCI, page 3. ACM, (2019)Hybrid soft error mitigation techniques for COTS processor-based systems., , , , , and . LATS, page 99-104. IEEE, (2016)On the Optimal Design of Triple Modular Redundancy Logic for SRAM-based FPGAs., , , and . DATE, page 1290-1295. IEEE Computer Society, (2005)Analyzing the Impact of Frequency and Diverse Path Delays in the Time Vulnerability Factor of Master-Slave D Flip-Flops., , and . ISVLSI, page 521-526. IEEE Computer Society, (2015)Single Event Upset in SRAM-based Field Programmable Analog Arrays: Effects and Mitigation., , , and . ISVLSI, page 192-197. IEEE Computer Society, (2007)Evaluating transient-fault effects on traditional C-element's implementations., , , , and . IOLTS, page 35-40. IEEE Computer Society, (2010)Design of a Robust 8-Bit Microprocessor to Soft Errors., , and . IOLTS, page 195-196. IEEE Computer Society, (2006)Applying TMR in Hardware Accelerators Generated by High-Level Synthesis Design Flow for Mitigating Multiple Bit Upsets in SRAM-Based FPGAs., , , , and . ARC, volume 10216 of Lecture Notes in Computer Science, page 202-213. (2017)Improving approximate-TMR using multi-objective optimization genetic algorithm., , , , , , and . LATS, page 1-6. IEEE, (2018)