Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

An In-Module Disturbance Barrier for Mitigating Write Disturbance in Phase-Change Memory., , , , , , and . IEEE Trans. Computers, 72 (4): 1150-1162 (April 2023)A Low-Cost and High-Throughput FPGA Implementation of the Retinex Algorithm for Real-Time Video Enhancement., , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (1): 101-114 (2020)SDM: Sharing-Enabled Disaggregated Memory System with Cache Coherent Compute Express Link., , , and . PACT, page 86-98. IEEE, (2023)PCMCsim: An Accurate Phase-Change Memory Controller Simulator and its Performance Analysis., , , , , , and . ISPASS, page 300-310. IEEE, (2022)Salus: Efficient Security Support for CXL-Expanded GPU Memory., , , and . HPCA, page 1-15. IEEE, (2024)HAD-TWL: Hot Address Detection-Based Wear Leveling for Phase-Change Memory Systems with Low Latency., , , , and . IEEE Comput. Archit. Lett., 18 (2): 107-110 (2019)WL-WD: Wear-Leveling Solution to Mitigate Write Disturbance Errors for Phase-Change Memory., , , and . IEEE Access, (2022)CryptoMMU: Enabling Scalable and Secure Access Control of Third-Party Accelerators., , , and . MICRO, page 32-48. ACM, (2023)Mitigating Write Disturbance Errors of Phase-Change Memory as In-Module Approach., , , , , , and . CoRR, (2020)Integration and Boost of a Read-Modify-Write Module in Phase Change Memory System., , , , and . IEEE Trans. Computers, 68 (12): 1772-1784 (2019)