Author of the publication

REPAS: Reliable Execution for Parallel ApplicationS in Tiled-CMPs.

, , and . Euro-Par, volume 5704 of Lecture Notes in Computer Science, page 321-333. Springer, (2009)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Confidence Estimation for Branch Prediction Reversal., , , and . HiPC, volume 2228 of Lecture Notes in Computer Science, page 214-223. Springer, (2001)Implementing P Systems Parallelism by Means of GPUs., , , , , and . Workshop on Membrane Computing, volume 5957 of Lecture Notes in Computer Science, page 227-241. Springer, (2009)Evaluating the DIPORSI Framework: Distributed Processing of Remotely Sensed Imagery., , , and . PVM/MPI, volume 2131 of Lecture Notes in Computer Science, page 401-409. Springer, (2001)Design and Implementation Requirements for CORBA Lightweight Components., , and . ICPP Workshops, page 213-220. IEEE Computer Society, (2001)Accelerating Grid Kernels for Virtual Screening on Graphics Processing Units., , and . PARCO, volume 22 of Advances in Parallel Computing, page 413-420. IOS Press, (2011)Exploiting silicon photonics for energy-efficient heterogeneous parallel architectures., and . Concurr. Comput. Pract. Exp., 26 (15): 2489-2491 (2014)Offloading strategies for Stencil kernels on the KNC Xeon Phi architecture: Accuracy versus performance., , , and . Int. J. High Perform. Comput. Appl., (2020)Leakage-efficient design of value predictors through state and non-state preserving techniques., , , and . J. Supercomput., 55 (1): 28-50 (2011)Extending the TokenCMP Cache Coherence Protocol for Low Overhead Fault Tolerance in CMP Architectures., , , and . IEEE Trans. Parallel Distributed Syst., 19 (8): 1044-1056 (2008)Efficient Eager Management of Conflicts for Scalable Hardware Transactional Memory., , and . IEEE Trans. Parallel Distributed Syst., 24 (1): 59-71 (2013)