Author of the publication

DeepPeep: Exploiting Design Ramifications to Decipher the Architecture of Compact DNNs.

, , , and . ACM J. Emerg. Technol. Comput. Syst., 17 (1): 5:1-5:25 (2020)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

DeepPeep: Exploiting Design Ramifications to Decipher the Architecture of Compact DNNs., , , and . ACM J. Emerg. Technol. Comput. Syst., 17 (1): 5:1-5:25 (2020)Voice conversion using linear prediction coefficients and artificial neural network., , , , and . CUBE, page 240-245. ACM, (2012)A trace signal selection algorithm for improved post-silicon debug., , and . EWDTS, page 1-4. IEEE Computer Society, (2016)A technique for low power, stuck-at fault diagnosable and reconfigurable scan architecture., , , , and . EWDTS, page 1-4. IEEE Computer Society, (2016)RTL level trace signal selection and coverage estimation during post-silicon validation., , , and . HLDVT, page 59-66. IEEE Computer Society, (2017)Orion: A Technique to Prune State Space Search Directions for Guidance-Based Formal Verification., , , , , and . ATS, page 123-128. IEEE, (2019)Implementation of MCL for effective ICT., , , and . WMNC, page 1-4. IEEE, (2013)A Methodology to Capture Fine-Grained Internal Visibility During Multisession Silicon Debug., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (4): 1002-1015 (2020)SAT-based Silicon Debug of Electrical Errors under Restricted Observability Enhancement., , and . J. Electron. Test., 35 (5): 655-678 (2019)Analyzing Hardware Security Properties of Processors through Model Checking., , , and . VLSID, page 107-112. IEEE, (2020)