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An integrated time-to-digital converter with 30-ps single-shot precision.

, , and . IEEE J. Solid State Circuits, 35 (10): 1507-1510 (2000)

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A Sigma-Delta Modulator Development Environment for Fractional-N Frequency Synthesis., , and . VLSI-SOC, page 50-54. Technische Universität Darmstadt, Insitute of Microelectronic Systems, (2003)A 1-V, self adjusting, 5-MHz CMOS RC-oscillator., , and . ISCAS (4), page 377-380. IEEE, (2002)High current CMOS operational amplifier., and . ISCAS (1), page 216-219. IEEE, (2005)Effects of the inhomogeneity of the time resolving CMOS single-photon avalanche diode array on time-gated Raman spectroscopy., , and . I2MTC, page 1-6. IEEE, (2017)An 80 × 25 pixel CMOS single-photon range image sensor with a flexible on-chip time gating topology for solid state 3D scanning., , , and . ESSCIRC, page 59-62. IEEE, (2017)On-Chip Voltage Reference-Based Time-to-Digital Converter for Pulsed Time-of-Flight Laser Radar Measurements., and . IEEE Trans. Instrum. Meas., 58 (6): 1938-1948 (2009)Characterization of the Timing Homogeneity in a CMOS SPAD Array Designed for Time-Gated Raman Spectroscopy., , , and . IEEE Trans. Instrum. Meas., 66 (7): 1837-1844 (2017)A hybrid ΔΣ fractional-N frequency synthesizer., and . IEEE Trans. Circuits Syst. II Express Briefs, 50 (4): 176-180 (2003)A time-to-digital converter (TDC) with a 13-bit cyclic time domain successive approximation interpolator with sub-ps-level resolution using current DAC and differential switch., , and . MWSCAS, page 828-831. IEEE, (2013)A practical Δ-Σ modulator design method based on periodical behavior analysis., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 52-II (10): 626-630 (2005)