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Disambiguation of "Hu, Yizhe"

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A Low-Flicker-Noise 30-GHz Class-F23 Oscillator in 28-nm CMOS Using Implicit Resonance and Explicit Common-Mode Return Path.

, , and . IEEE J. Solid State Circuits, 53 (7): 1977-1987 (2018)

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Jun Hu

Shouyun Hu

Jianjiang Hu

Chengyong Hu

Yi Hu

 

Other publications of authors with the same name

A Compact 0.2-0.3-V Inverse-Class-F23 Oscillator for Low 1/f3 Noise Over Wide Tuning Range., , , , , , and . IEEE J. Solid State Circuits, 57 (2): 452-464 (2022)Flicker Phase-Noise Reduction Using Gate-Drain Phase Shift in Transformer-Based Oscillators., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 69 (3): 973-984 (2022)DTC-Assisted All-Digital Phase-Locked Loop Exploiting Hybrid Time/Voltage Phase Digitization., , , , and . APCCAS, page 81-84. IEEE, (2019)A Low-Flicker-Noise 30-GHz Class-F23 Oscillator in 28-nm CMOS Using Implicit Resonance and Explicit Common-Mode Return Path., , and . IEEE J. Solid State Circuits, 53 (7): 1977-1987 (2018)A 30-GHz class-F23 oscillator in 28nm CMOS using harmonic extraction and achieving 120 kHz 1/f3 corner., , and . ESSCIRC, page 87-90. IEEE, (2017)An 18.8-to-23.3 GHz ADPLL Based on Charge-Steering-Sampling Technique Achieving 75.9 fs RMS Jitter and -252 dB FoM., , , , and . VLSI Technology and Circuits, page 1-2. IEEE, (2023)28 GHz Quadrature Frequency Generation Exploiting Injection-Locked Harmonic Extractors for 5G Communications., , , and . NEWCAS, page 1-4. IEEE, (2019)A Reference-Waveform Oversampling Technique in a Fractional-N ADPLL., , , , and . IEEE J. Solid State Circuits, 56 (11): 3445-3457 (2021)Multirate Timestamp Modeling for Ultralow-Jitter Frequency Synthesis: A Tutorial., , and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (7): 3030-3036 (2022)Oscillator Flicker Phase Noise: A Tutorial., , and . IEEE Trans. Circuits Syst. II Express Briefs, 68 (2): 538-544 (2021)