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Logic circuit design using monostable-bistable transition logic element based on standard BiCMOS process.

K. Gan, C. Tsai, Y. Li, and J. Lu. Microelectron. J., 42 (2): 477-482 (2011)

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Sarah Marie Jow

Tian Gan

Lishan Gan

Gan Lu

Lei Gan

Other publications of authors with the same name

The impact of interface/border defect on performance and reliability of high-k/metal-gate CMOSFET.W. Yeh, P. Chen, K. Gan, J. Wang, and C. Lai. Microelectron. Reliab., 53 (2): 265-269 (2013)Design of AND and NAND Logic Gate Using NDR-BASED Circuit Suitable for CMOS Process.D. Liang, C. Tai, K. Gan, C. Tsai, and Y. Chen. APCCAS, page 1325-1328. IEEE, (2006)Logic circuit design using monostable-bistable transition logic element based on standard BiCMOS process.K. Gan, C. Tsai, Y. Li, and J. Lu. Microelectron. J., 42 (2): 477-482 (2011)Novel Multiple-Valued Logic Design Using BiCMOS-Based Negative Differential Resistance Circuit Biased by Two Current Sources.K. Gan, D. Liang, and Y. Chen. IEICE Trans. Inf. Syst., 93-D (8): 2068-2072 (2010)New D-Type Flip-Flop Design Using Negative Differential Resistance Circuits.D. Liang, and K. Gan. DELTA, page 258-261. IEEE Computer Society, (2008)Four-Valued Memory Circuit Designed by Multiple-Peak MOS-NDR Devices and Circuits.D. Liang, K. Gan, L. Su, C. Chen, C. Hsiao, C. Tsai, Y. Chen, S. Wang, S. Kuo, and F. Chiang. IWSOC, page 78-81. IEEE Computer Society, (2005)Multiple-Valued Memory Design by Standard BiCMOS Technique.D. Liang, K. Gan, J. Lu, C. Tai, C. Tsai, G. Lan, and Y. Chen. CSIE (3), page 596-599. IEEE Computer Society, (2009)Logic Circuit Design Based on MOS-NDR Devices and Circuits Fabricated by CMOS Process.K. Gan, D. Liang, C. Hsiao, S. Wang, F. Chiang, C. Tsai, Y. Chen, S. Kuo, and C. Chen. IWSOC, page 392-395. IEEE Computer Society, (2005)Novel Voltage-Controlled Oscillator Design by MOS-NDR Devices and Circuits.D. Liang, K. Gan, C. Hsiao, C. Tsai, Y. Chen, S. Wang, S. Kuo, F. Chiang, and L. Su. IWSOC, page 372-375. IEEE Computer Society, (2005)Standard BiCMOS Implementation of a Two-Peak Negative Differential Resistance Circuit with High and Adjustable Peak-to-Valley Current Ratio.D. Liang, K. Gan, C. Tai, and C. Tsai. IEICE Trans. Electron., 92-C (5): 635-638 (2009)

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Disambiguation of "Gan, Kwang-Jow"

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Logic circuit design using monostable-bistable transition logic element based on standard BiCMOS process.

Please choose a person to relate this publication to

Sarah Marie Jow

Tian Gan

Lishan Gan

Gan Lu

Lei Gan

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Gan, Kwang-Jow"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Logic circuit design using monostable-bistable transition logic element based on standard BiCMOS process.

Please choose a person to relate this publication to

Sarah Marie Jow

Tian Gan

Lishan Gan

Gan Lu

Lei Gan

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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Logic circuit design using monostable-bistable transition logic element based on standard BiCMOS process.