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Disambiguation of "Ito, Kazuhito"

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A Method to Reduce Energy Consumption of Conditional Operations with Execution Probabilities.

, and . IPSJ Trans. Syst. LSI Des. Methodol., (2013)

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Nobutaka Ito

Akio Ito

Takao Ito

Hisao Ito

Takuro Ito

 

Other publications of authors with the same name

A Processor Accelerator for Software Decoding of Reed-Solomon Codes., and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 95-A (5): 884-893 (2012)A Method to Reduce Energy Consumption of Conditional Operations with Execution Probabilities., and . IPSJ Trans. Syst. LSI Des. Methodol., (2013)A Resource Binding Method to Reduce Data Communication Power Dissipation on LSI., and . IPSJ Trans. Syst. LSI Des. Methodol., (2010)A scheduling and allocation method to reduce data transfer time by dynamic reconfiguration.. ASP-DAC, page 323-328. ACM, (2000)Module selection and data format conversion for cost-optimal DSP synthesis., , and . ICCAD, page 322-329. IEEE Computer Society / ACM, (1994)A Processor Accelerator for Software Decoding of BCH Codes.. IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 93-A (7): 1329-1337 (2010)New Rate Control Method with Minimum Skipped Frames for Very Low Delay in H.263+ Codec., , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 85-A (6): 1396-1407 (2002)A Generalized Technique for Register Counting and its Application to Cost-Optimal DSP Architecture Synthesis., and . VLSI Signal Processing, 16 (1): 57-72 (1997)Minimization of Vote Operations for Soft Error Detection in DMR Design with Error Correction by Operation Re-Execution., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 101-A (12): 2271-2279 (2018)Hardware Efficient and Low Latency Implementations of Look-Ahead ACS Computation for Viterbi Decoders., and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 96-A (12): 2680-2688 (2013)