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Disambiguation of "Chong, Kwen-Siong"

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Low power sub-threshold asynchronous QDI Static Logic Transistor-level Implementation (SLTI) 32-bit ALU.

, , , and . ISCAS, page 353-356. IEEE, (2013)

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Vanessa Chong

Sung-Won Chong-Schachel

Keum Sun Chong

Wachira Chongburee

Christopher Chong

 

Other publications of authors with the same name

Interceptive side channel attack on AES-128 wireless communications for IoT applications., , , and . APCCAS, page 650-653. IEEE, (2016)A Highly Secure FPGA-Based Dual-Hiding Asynchronous-Logic AES Accelerator Against Side-Channel Attacks., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 30 (9): 1144-1157 (2022)Ultra-Low Power Read-Decoupled SRAMs with Ultra-Low Write-Bitline Voltage Swing., , and . Circuits Syst. Signal Process., 33 (10): 3317-3329 (2014)Synchronous-Logic and Asynchronous-Logic 8051 Microcontroller Cores for Realizing the Internet of Things: A Comparative Study on Dynamic Voltage Scaling and Variation Effects., , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 3 (1): 23-34 (2013)A 16-Channel Low-Power Nonuniform Spaced Filter Bank Core for Digital Hearing Aids., , and . IEEE Trans. Circuits Syst. II Express Briefs, 53-II (9): 853-857 (2006)Synchronous-Logic and Globally-Asynchronous-Locally-Synchronous (GALS) Acoustic Digital Signal Processors., , , and . IEEE J. Solid State Circuits, 47 (3): 769-780 (2012)Design and Analysis of Area and Energy Efficient Reconfigurable Cryptographic Accelerator for Securing IoT Devices., , , , , , , , , and 1 other author(s). Sensors, 22 (23): 9160 (2022)A DPA-Resistant Asynchronous-Logic NoC Router with Dual-Supply-Voltage-Scaling for Multicore Cryptographic Applications., , , , , , , and . ISCAS, page 1-5. IEEE, (2020)A comparative study on asynchronous Quasi-Delay-Insensitive templates., , , , , and . ISCAS, page 1819-1822. IEEE, (2012)A single-VDD half-clock-tolerant fine-grained dynamic voltage scaling pipeline., , , , and . ISCAS, page 2589-2592. IEEE, (2015)