Author of the publication

Diagnosis of clustered faults and wafer testing.

, , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 17 (2): 136-148 (1998)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Higher Certainty of Error Coverage by Output Data Modification., and . ITC, page 140-147. IEEE Computer Society, (1984)Testability Measures : What Do They Do for ATPG ?, and . ITC, page 129-139. IEEE Computer Society, (1986)Resolution-Oriented Fault Interrelationships in Combinational Logic Networks., and . IEEE Trans. Computers, 26 (11): 1170-1175 (1977)Recursive Coverage Projection of Test Sets., and . IEEE Trans. Computers, 28 (11): 865-870 (1979)Testing and Diagnosis of Interconnects Using Boundary Scan Architecture., , and . ITC, page 126-137. IEEE Computer Society, (1988)VTS 1994 Panel Report on BIST for Consumer Products.. IEEE Des. Test Comput., 12 (1): 12- (1995)Performance of Interconnection Network in Multithreaded Architectures., , , and . PARLE, volume 817 of Lecture Notes in Computer Science, page 823-826. Springer, (1994)Invited Talk: Embedded Test for Systems-on-a-Chip.. VLSI Design, IEEE Computer Society, (1999)Optimizing error masking in BIST by output data modification., and . J. Electron. Test., 1 (1): 59-71 (1990)Testing and Applications of Inverter-Free PLAs., and . IEEE Des. Test, 4 (6): 30-40 (1987)