Author of the publication

iRazor: Current-Based Error Detection and Correction Scheme for PVT Variation in 40-nm ARM Cortex-R4 Processor.

, , , , , , , and . IEEE J. Solid State Circuits, 53 (2): 619-631 (2018)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

An All-Digital Edge Racing True Random Number Generator Robust Against PVT Variations., , and . IEEE J. Solid State Circuits, 51 (4): 1022-1031 (2016)A 28-nm 368-fJ/Cycle, 0.43%/V Supply-Sensitivity, FLL-Based RC Oscillator Featuring Positive-TC-Only Resistors and ΔΣM-Based Trimming., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 70 (11): 3950-3954 (November 2023)Exploiting the analog properties of digital circuits for malicious hardware., , , , and . Commun. ACM, 60 (9): 83-91 (2017)MeNTT: A Compact and Efficient Processing-in-Memory Number Theoretic Transform (NTT) Accelerator., , and . CoRR, (2022)DCT-RAM: A Driver-Free Process-In-Memory 8T SRAM Macro with Multi-Bit Charge-Domain Computation and Time-Domain Quantization., , , , and . CICC, page 1-2. IEEE, (2022)14.2 A physically unclonable function with BER-8 for robust chip authentication using oscillator collapse in 40nm CMOS., , , and . ISSCC, page 1-3. IEEE, (2015)A 562F2 Physically Unclonable Function with a Zero-Overhead Stabilization Scheme., and . ISSCC, page 400-402. IEEE, (2019)A Fully Synthesizable 100Mbps Edge-Chasing True Random Number Generator., and . VLSI Technology and Circuits, page 1-2. IEEE, (2023)Rectified-linear and recurrent neural networks built with spin devices., , , , and . ISCAS, page 1-4. IEEE, (2017)A robust -40 to 120°C all-digital true random number generator in 40nm CMOS., , and . VLSIC, page 248-. IEEE, (2015)