( en | de | ru )

 

Disambiguation of "Kajihara, Nobuki"

Author of the publication

copydeleteadd this publication to your clipboard
Mapping Algorithms for a Multi-Bit Data Path Processing Reconfigurable Chip RHW.

, , , and . FCCM, page 281-282. IEEE Computer Society, (2000)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Kajihara, Nobuki
add a person with the name Kajihara, Nobuki
 

Other publications of authors with the same name

Evolvable Hardware Chips for Industrial Applications., and . Commun. ACM, 42 (4): 60-66 (1999)MAN-YO: Mixed level parallel logic simulation engine., , and . Syst. Comput. Jpn., 20 (10): 31-38 (1989)An Evolvable Hardware Chip and Its Application as a Multi-Function Prosthetic Hand Controller., , , , and . AAAI/IAAI, page 182-187. AAAI Press / The MIT Press, (1999)The GRD Chip: Genetic Reconfiguration of DSPs for Neural Network Processing., , , , , , and . IEEE Trans. Computers, 48 (6): 628-639 (1999)Evolvable Hardware Chips for Neural Network Applications., , , , , and . ICANNGA, page 127-134. Springer, (1999)Parallel neural network simulation machine: Neuman., , , and . Neural Networks, 1 (Supplement-1): 544 (1988)Arithmetic Operation Oriented Reconfigurable Chip: RHW., , , and . FPL, volume 2147 of Lecture Notes in Computer Science, page 618-622. Springer, (2001)Real-world applications of analog and digital evolvable hardware ., , , , , , , , , and 1 other author(s). IEEE Trans. Evol. Comput., 3 (3): 220-235 (1999)Mapping Algorithms for a Multi-Bit Data Path Processing Reconfigurable Chip RHW., , , and . FCCM, page 281-282. IEEE Computer Society, (2000)Implementation of a Gate-Level Evolvable Hardware Chip., , , , and . ICES, volume 2210 of Lecture Notes in Computer Science, page 38-49. Springer, (2001)