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Shortest Path Queries Among Weighted Obstacles in the Rectilinear Plane.

, , and . SIAM J. Comput., 29 (4): 1223-1246 (2000)

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A Framework for 1-D Compaction with Forbidden Region Avoidance., and . Comput. Geom., (1991)Shortest Path Computations in Source-Deplanarized Graphs., , and . Inf. Process. Lett., 47 (2): 71-75 (1993)New Algorithms for Minimizing the Longest Wire Length During Circuit Compaction., and . Algorithmica, 17 (4): 426-448 (1997)A framework for 1-D compaction with forbidden region avoidance VLSI layout., and . Great Lakes Symposium on VLSI, page 146-151. IEEE, (1991)Shortest Path Queries Among Weighted Obstacles in the Rectilinear Plane., , and . SCG, page 370-379. ACM, (1995)New Algorithms for Minimizing the Longest Wire Length during Circuit Compaction., and . ISAAC, volume 762 of Lecture Notes in Computer Science, page 446-455. Springer, (1993)Finding All Shortest Path Edge Sequences on a Convex Polyhedron., , and . WADS, volume 382 of Lecture Notes in Computer Science, page 251-266. Springer, (1989)New Algorithms and Approaches for 1-Dimensional Layout Compaction., and . New Results and New Trends in Computer Science, volume 555 of Lecture Notes in Computer Science, page 152-171. Springer, (1991)Edge Weight Reduction Problems in Directed Acyclic Graphs., and . J. Algorithms, 24 (1): 66-93 (1997)Minimizing total wire length during 1-dimensional compaction., and . Integr., 14 (2): 113-144 (1992)